This paper describes a design optimization of power distribution networks using embedded passive technology. A frequency-domain methodology was used to study the impedance characteristics of printed circuit board power planes with embedded decoupling capacitors, and also the interaction with discrete capacitors, package structures and on-chip capacitors. Two different thin-core materials were analyzed. Key aspects of power distribution networks including plane spreading inductance, plane pair via inductance and transfer impedance were also analyzed. Utilizing broadband PDN models, extracted with full-wave EM techniques to account for frequency-dependent behaviour, frequency-domain SPICE simulations were carried out to determine the system impedance characteristics at multiple port locations up to 2 GHz. The frequency-domain analysis shows that in bare boards, significant SSN interaction between different port locations within the printed circuit board is present. It is concluded that the proper use of high-K distributed capacitors at optimal locations on the printed circuit board helps to alleviate SSN interaction between different port locations. Several multi-layer test vehicles have been fabricated and characterized, with good correlation between simulation results and measured values.
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ASME 2003 International Electronic Packaging Technical Conference and Exhibition
July 6–11, 2003
Maui, Hawaii, USA
Conference Sponsors:
- Electronic and Photonic Packaging Division
ISBN:
0-7918-3690-8
PROCEEDINGS PAPER
Design Optimization of Power Distribution Design Networks Using Embedded Passive Technology
Albert Chee W. Lu,
Albert Chee W. Lu
Singapore Institute of Manufacturing Technology, Singapore
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Wei Fan,
Wei Fan
Singapore Institute of Manufacturing Technology, Singapore
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Lai L. Wai,
Lai L. Wai
Singapore Institute of Manufacturing Technology, Singapore
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Toshiro Yamazaki,
Toshiro Yamazaki
Hitachi Chemical Asia-Pacific Pte Ltd., Singapore
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Jacinto Jun Jarcia, Jr.,
Jacinto Jun Jarcia, Jr.
Hitachi Chemical Asia-Pacific Pte Ltd., Singapore
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Kim H. Chin
Kim H. Chin
Hitachi Chemical Asia-Pacific Pte Ltd., Singapore
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Albert Chee W. Lu
Singapore Institute of Manufacturing Technology, Singapore
Wei Fan
Singapore Institute of Manufacturing Technology, Singapore
Lai L. Wai
Singapore Institute of Manufacturing Technology, Singapore
Toshiro Yamazaki
Hitachi Chemical Asia-Pacific Pte Ltd., Singapore
Jacinto Jun Jarcia, Jr.
Hitachi Chemical Asia-Pacific Pte Ltd., Singapore
Kim H. Chin
Hitachi Chemical Asia-Pacific Pte Ltd., Singapore
Paper No:
IPACK2003-35221, pp. 727-733; 7 pages
Published Online:
January 5, 2009
Citation
Lu, ACW, Fan, W, Wai, LL, Yamazaki, T, Jarcia, JJ, Jr., & Chin, KH. "Design Optimization of Power Distribution Design Networks Using Embedded Passive Technology." Proceedings of the ASME 2003 International Electronic Packaging Technical Conference and Exhibition. 2003 International Electronic Packaging Technical Conference and Exhibition, Volume 2. Maui, Hawaii, USA. July 6–11, 2003. pp. 727-733. ASME. https://doi.org/10.1115/IPACK2003-35221
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