The objective of this study is to compare different geometric models to represent thermal vias (plated though holes - PTH) in the substrate of a 196-ball FBGA package. The baseline model, which models each via individually as PTHs, was compared with models that model each via individually by solid cylinders and square cross-section prismatic blocks, and a compact model that models all vias by one prismatic block. The computational fluid dynamics (CFD) simulations were carried out using Icepak®. It was found that all simplifications led to some degree of under-prediction of the junction temperature. The results showed that the detailed models with the cylindrical cross-section and the square cross-section under-predicted the junction temperature by about 3–4% compared to the baseline model. The compact model, however, under-predicted the junction temperature by about 10% compared to the baseline model. The explanation for this error produced by the compact model is that it cannot model the constriction effect of the small individual thermal vias. The conclusion of this study is that all simplifications led to some degree of under-prediction of the junction temperature, and the popular technique to model the thermal vias by a block can lead to appreciable errors in predicting the die temperature.
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ASME 2003 International Electronic Packaging Technical Conference and Exhibition
July 6–11, 2003
Maui, Hawaii, USA
Conference Sponsors:
- Electronic and Photonic Packaging Division
ISBN:
0-7918-3690-8
PROCEEDINGS PAPER
Thermal Modeling of Plated-Through Hole Vias in a FBGA Package
X. Howard Sun,
X. Howard Sun
Fluent, Inc., Santa Clara, CA
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R. Sahan
R. Sahan
Fluent, Inc., Santa Clara, CA
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X. Howard Sun
Fluent, Inc., Santa Clara, CA
Z. Zhao
Broadcom Corporation, Irvine, CA
R. Sahan
Fluent, Inc., Santa Clara, CA
Paper No:
IPACK2003-35092, pp. 201-206; 6 pages
Published Online:
January 5, 2009
Citation
Sun, XH, Zhao, Z, & Sahan, R. "Thermal Modeling of Plated-Through Hole Vias in a FBGA Package." Proceedings of the ASME 2003 International Electronic Packaging Technical Conference and Exhibition. 2003 International Electronic Packaging Technical Conference and Exhibition, Volume 2. Maui, Hawaii, USA. July 6–11, 2003. pp. 201-206. ASME. https://doi.org/10.1115/IPACK2003-35092
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