PWBA warpage is further compounded by the high densification of the PWBA, where heat dissipation occurs over a very small area during in-service operation. Automated component placement or insertion is difficult and sometimes impossible to achieve on a warped board. PWB assembly warpage will results in many problems including non co-planarity, chip/component surface crack, delamination, poor connectivity, floating, creep, failure and so on. Also PWBAs are sometimes subjected to mechanical loading as well as thermal loading during their lifetime, which will cause PWB deflection and stress/strain in the PWB assemblies. These mechanical loading will increase stress/strain level inside PWB and may have an effect on interconnect, PWB, or package reliability. In order to evaluate the reliability of PWBA, an optimal modeling is necessary. This paper reviews the literature with an understanding of layout and layup impact on PWB warpage for minimizing warpage of PWB architecture. This compilation of literature would help to enhance the quality and reliability of products by minimizing failures of device and component from PWB excessive warpage and to reduce production cost because of minimizing repair needs on the production line.
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ASME 2003 International Electronic Packaging Technical Conference and Exhibition
July 6–11, 2003
Maui, Hawaii, USA
Conference Sponsors:
- Electronic and Photonic Packaging Division
ISBN:
0-7918-3690-8
PROCEEDINGS PAPER
The Impact of Board Layout and Layup on PWB Warpage During Fabrication and Due to Reflow Solder Process: A Review of Literature
Wonkee Ahn,
Wonkee Ahn
University of Texas at Arlington, Arlington, TX
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Dereje Agonafer,
Dereje Agonafer
University of Texas at Arlington, Arlington, TX
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Shlomo Novotny
Shlomo Novotny
Sun Microsystems, Burlington, MA
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Wonkee Ahn
University of Texas at Arlington, Arlington, TX
Dereje Agonafer
University of Texas at Arlington, Arlington, TX
Shlomo Novotny
Sun Microsystems, Burlington, MA
Paper No:
IPACK2003-35296, pp. 863-877; 15 pages
Published Online:
January 5, 2009
Citation
Ahn, W, Agonafer, D, & Novotny, S. "The Impact of Board Layout and Layup on PWB Warpage During Fabrication and Due to Reflow Solder Process: A Review of Literature." Proceedings of the ASME 2003 International Electronic Packaging Technical Conference and Exhibition. 2003 International Electronic Packaging Technical Conference and Exhibition, Volume 1. Maui, Hawaii, USA. July 6–11, 2003. pp. 863-877. ASME. https://doi.org/10.1115/IPACK2003-35296
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