Wafer-level and four-point-bending (4PB) techniques are normally utilized for calibration of stress sensor test die. While excellent accuracy and repeatability have been demonstrated, the wafer-level technique requires access to a complete silicon wafer, whereas the 4PB method requires 5–10 cm strips of die. However, access to full wafers, or even strips of die, is typically limited to companies and universities with captive semiconductor fabrication facilities. In this paper, a chip-on-beam technique is demonstrated in which individual die are attached to silicon beams, and stress for calibration is applied to the beam using a precision 4PB fixture. Because of the resulting nonuniform stress distribution on the surface of the die, experimental measurements must be combined with finite element simulation results to extract the desired piezoresistive coefficients. These calibration results are compared to those obtained directly from strips of the same die, and it is shown that excellent agreement can be obtained between the two methods under proper experimental conditions. This work delineates the best location for calibration rosettes on the die as well as design of the beam geometry, relative to the chip dimensions, that will ensure the high accuracy calibration results. This technique permits measurement of the piezoresistive coefficients for a limited set of die such as those that may be obtained from typical MOSIS fabrication runs.

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