As transistor densities on integrated circuits (ICs) continue to grow, off-chip bandwidth is becoming an ever-increasing performance-limiting bottleneck in systems. Electronic multichip module (MCM) and printed circuit board (PCB) packaging technology has not kept pace with the growth of inter-chip interconnection requirements. Recent advances in “smart pixel” technology offer the potential to use optical interconnects to overcome the inter-chip I/O bottleneck by linking dense arrays of Vertical Cavity Surface Emitting Lasers (VCSELs) and photodetectors. For optical interconnections to be relevant to real systems they must be able to be manufactured and packaged inexpensively and robustly. This paper discusses an optical design and packaging approach that utilizes multiple sizes (or scales) of optical elements to simplify the design of the optical interconnection and coupling while providing an enhanced degree of insensitivity to misalignments inherent in the packaging of these systems. The scales of the optical elements described are: the size of the IC (termed macrooptical), the size of the pitch of optical IO (termed microoptical), and sizes in between (termed mini-optical) which are smaller than the size of the IC but cover several optical IO. This paper describes the utility of elements of each of these scales and shows that through the combination of them simple robust systems can be constructed. Two case studies for applying this multi-scale optical design are examined. The first case study is a global chip-to-chip optical interconnection module (termed FAST-Net) that uses a macro lens array and mirror to effect the all-to-all optical interconnection pattern among an array of ICs on a single board. Micro- and mini-scale optical elements simplify the design of the macro-lens by performing corrections at scales where they are more effective. In this system over 11,000 optical links are implemented across a 5 inch multi-chip module with diffraction limited RMS spot sizes and registration errors less than 5 microns. The second case study analyzes designs for board-to-board optical interconnections with throw-distances ranging from 1 millimeter to several centimeters. In this case micro- and mini-scale optical interconnections provide insensitivity to misalignments. The results show the feasibility of an optical coupler that can tolerate the typical packaging misalignments of 5 to 10 mil without placing rigid constraints on the angular sensitivity of the modules. The multi-scale optical interconnection and coupling concept is shown to provide an approach to simplifying design and packaging — and therefore the costs — associated with implementing optical interconnection systems.
Skip Nav Destination
ASME 2003 International Electronic Packaging Technical Conference and Exhibition
July 6–11, 2003
Maui, Hawaii, USA
Conference Sponsors:
- Electronic and Photonic Packaging Division
ISBN:
0-7918-3690-8
PROCEEDINGS PAPER
Multi-Scale Optical Design for Global Chip-to-Chip Optical Interconnections and Misalignment Tolerant Packaging
Marc P. Christensen,
Marc P. Christensen
Southern Methodist University, Dallas, TX
Search for other works by this author on:
Predrag Milojkovic,
Predrag Milojkovic
Applied Photonics, Inc., Fairfax, VA
Search for other works by this author on:
Michael J. McFadden,
Michael J. McFadden
University of Delaware, Newark, DE
Search for other works by this author on:
Michael W. Haney
Michael W. Haney
University of Delaware, Newark, DE
Search for other works by this author on:
Marc P. Christensen
Southern Methodist University, Dallas, TX
Predrag Milojkovic
Applied Photonics, Inc., Fairfax, VA
Michael J. McFadden
University of Delaware, Newark, DE
Michael W. Haney
University of Delaware, Newark, DE
Paper No:
IPACK2003-35287, pp. 673-680; 8 pages
Published Online:
January 5, 2009
Citation
Christensen, MP, Milojkovic, P, McFadden, MJ, & Haney, MW. "Multi-Scale Optical Design for Global Chip-to-Chip Optical Interconnections and Misalignment Tolerant Packaging." Proceedings of the ASME 2003 International Electronic Packaging Technical Conference and Exhibition. 2003 International Electronic Packaging Technical Conference and Exhibition, Volume 1. Maui, Hawaii, USA. July 6–11, 2003. pp. 673-680. ASME. https://doi.org/10.1115/IPACK2003-35287
Download citation file:
7
Views
Related Proceedings Papers
A Titanium Based Flat Heat Pipe
IMECE2008
Packaging Friendly Parallel Optical Transceivers
InterPACK2003
Related Articles
Embedded Three-Dimensional Hybrid Integrated Circuit Integration System-in-Package With Through-Silicon Vias for Opto-Electronic Interconnects in Organic Substrates/Printed Circuit Boards
J. Electron. Packag (September,2011)
Optical Design of a Novel Two-Stage Solar Trough Concentrator Based on Pneumatic Polymeric Structures
J. Sol. Energy Eng (August,2009)
Comparison and Optimization of Heliostat Canting Methods
J. Sol. Energy Eng (February,2009)
Related Chapters
Component and Printed Circuit Board
Thermal Management of Telecommunication Equipment, Second Edition
Component and Printed Circuit Board
Thermal Management of Telecommunications Equipment
Component and Printed Circuit Board
Thermal Management of Microelectronic Equipment, Second Edition