Industry demands on power delivery continue to increase with higher performance silicon products. As a result, higher current sustainability and better transient response are key parameters frequently sought in successful power delivery designs. One key design feature for improved transient response involves locating decoupling capacitance as close to the load as possible. At the board level, this is typically accomplished by placing capacitors around the immediate vicinity of the load. With a set of identical capacitors in parallel, total capacitance is essentially a multiple of the number of caps while the effective series resistance and inductance is divided. However the realities of package and motherboard design can often limit the number and size of the capacitors placed in the vicinity of the load. In some cases, the capacitors may interfere with other routings to and from the component. In other cases, placement of the capacitors with respect to the DC current path may limit their effectiveness by inducing a large effective series inductance to the load. This paper describes a potential design method for maximizing capacitor effectiveness while minimizing its impact on other board features. The design is primarily implemented in board assembly and involves placing capacitors directly between power and ground board-component solder joints. As an extension of Capacitor Under BGA designs, this method is termed Advanced Capacitor Under BGA (ACUB). Using ACUB can improve load decoupling, but can require new approaches to board and component assembly. This paper discusses a number of potential design improvements allowed for using this design approach. In addition, factors involved in successful assembly are discussed and sets of proof-of-concept prototype designs are presented along with assembly results. From this, some designs with potential for further development are identified and next steps discussed.

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