MEMS packaging has always been a field of great importance since it can dominate the cost and size of a final working device. Considering this, we have concentrated on developing a wafer-scale encapsulation scheme which uses a thick epi-poly (epitaxially deposited poly silicon) layer as the sealing layer. This approach allows the use of conventional post processing, such as dicing, wire bonding, and other standard handling and mounting techniques. We also can minimize the chip area used for packaging, in some cases reducing the chip size by ×5 from what was required for silicon fusion bonded covers. This packaging scheme can be used for various MEMS devices and can be integrated with other electronics. This paper will discuss the packaging process and show some preliminary results.

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