SnAgCu solder used in laminate package like PBGA and CSP BGA to replace eutectic SnPb as interconnection has become major trend in the electronic industry. But unlike well-known failure mode of wire bonding package, flip chip package with SnAgCu inner solder bump and external solder ball as electrical interconnection present a extremely different failure mode with wire-bonding package from a point of view in material and process. In this study, one 16mm×16mm 3000 I/O SnAgCu wafer bumping using screen-printing process was explored including the effects of reflow times, high temperature storage life (HTSL) and temperature cycle test (TCT) on bump shear strength. Furthermore, the qualified wafer bumping is assembled by flip chip assembly with various underfill material and specific organic build-up substrate, then is subject to MSL4/260°C precondition and temperature cycle test to observe the underfill effect on SnAgCu bump protection and solder joint life. Various failure modes in the flip chip package like solder bump, underfill and UBM and so on, will be scrutinized with SEM. And finally, best material combination will be addressed to make the lead free flip package successful.
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ASME 2003 International Electronic Packaging Technical Conference and Exhibition
July 6–11, 2003
Maui, Hawaii, USA
Conference Sponsors:
- Electronic and Photonic Packaging Division
ISBN:
0-7918-3690-8
PROCEEDINGS PAPER
Development of Lead-Free Flip Chip Package and Its Reliability
Jeffrey C. B. Lee,
Jeffrey C. B. Lee
Advanced Semiconductor Engineering, Inc., Kaohsiung, Taiwan, R. O. C.
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Sting Wu,
Sting Wu
Advanced Semiconductor Engineering, Inc., Kaohsiung, Taiwan, R. O. C.
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H. L. Chou,
H. L. Chou
Advanced Semiconductor Engineering, Inc., Kaohsiung, Taiwan, R. O. C.
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Yi-Shao Lai
Yi-Shao Lai
Advanced Semiconductor Engineering, Inc., Kaohsiung, Taiwan, R. O. C.
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Jeffrey C. B. Lee
Advanced Semiconductor Engineering, Inc., Kaohsiung, Taiwan, R. O. C.
Sting Wu
Advanced Semiconductor Engineering, Inc., Kaohsiung, Taiwan, R. O. C.
H. L. Chou
Advanced Semiconductor Engineering, Inc., Kaohsiung, Taiwan, R. O. C.
Yi-Shao Lai
Advanced Semiconductor Engineering, Inc., Kaohsiung, Taiwan, R. O. C.
Paper No:
IPACK2003-35046, pp. 115-121; 7 pages
Published Online:
January 5, 2009
Citation
Lee, JCB, Wu, S, Chou, HL, & Lai, Y. "Development of Lead-Free Flip Chip Package and Its Reliability." Proceedings of the ASME 2003 International Electronic Packaging Technical Conference and Exhibition. 2003 International Electronic Packaging Technical Conference and Exhibition, Volume 1. Maui, Hawaii, USA. July 6–11, 2003. pp. 115-121. ASME. https://doi.org/10.1115/IPACK2003-35046
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