Abstract
A bare chip packaging with an encapsulated flip chip joint on an epoxy base carrier is now emerging into an electronic packaging industry due to its high density, high performance and low cost capability. Generally, one of the key points of the bare chip packaging is to overcome thermal stress caused by a mismatch of coefficient of thermal expansion (CTE) between the chip and carrier. Initially, a ceramic carrier was used because of its low CTE which minimizes the mismatch of CTE. A technical break through was made to use an epoxy base carrier as the chip carrier instead of ceramic one by resolving a large CTE mismatch with an epoxy encapsulant which fills the space between the chip and carrier [Tsukada et al., 1992].
This technology is basically applied to implement a package of bare chip attach on mother board and now expanding to provide a chip attach in a BGA package. Though such packages are become to be used for various products, the reliability characteristics are not sufficiently explored yet. This paper describes the solder joint life comparison as the one of such items between these two package types, bare chip and BGA on planar, and two way of assembling to carrier, single side and double side assembly.
