3D integration consists of 3D IC packaging, 3D IC integration, and 3D Si integration. They are different and in general the TSV (through-silicon via) separates 3D IC packaging from 3D IC integration and 3D Si integration since the latter two use TSV but 3D IC packaging does not. TSV (with a new concept that every chip could have two surfaces with circuits) is the focus of this investigation. State-of-the-art, key differences, trends of these three technologies, and a 3D integration roadmap are presented.

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