A Hybrid Approach to Investigate Effect of Flip-Chip Packaging on RF MEMS Devices Performance

A hybrid numerical/experimental scheme to investigate the effect of flip-chip packaging, with and without underfill, on MEMS device performance will be described. Finite element analysis (FEA) is used to model the MEMS assembly and is verified with Twyman/Green (T/G) and Moire´ interferometry, and good agreement between FEA and optical measurements is obtained. The die warpage in assemblies with and without underfill are approximately 0.36 μm and 1.1 μm, respectively. The performance of MEMS devices, fixed-fixed beams, in the packages is characterized by Capacitance-Voltage (C-V) measurement sweeping the actuation voltage yielding the “ON” state and “OFF” state capacitances. Beams in packages without underfill exhibit good actuation behavior while beams in packages with underfill are already in the down-position after packaging. Because die warpage of packages with and without underfill are significantly different, beam anchor relative displacement (BARD), which is affected by the warpage, is used to understand the C-V performance. From numerical models, BARD of packages without underfill is 50 nm and 162 nm for packages with underfill. Compared to a simplified critical BARD calculation (BARD_crit = 57 nm), the large BARD of packages with underfill implies that beams may have buckled, which results in the poor C-V performance. Further modeling of varied die thicknesses and coefficients of thermal expansion (CTE) of the underfill shows that the reduction of BARD is limited because of strong underfill-induced coupling between the die and substrate. It is concluded that the MEMS device and package have to be considered as a coupled design problem to minimize the adverse packaging effect on MEMS devices.