With the continuing industry trends towards smaller, faster and higher power devices, thermal management has become an extremely important element in the development of computer products. The primary goal of a good thermal design is to ensure that the chip can function at its rated frequency, while maintaining its junction temperature below the specified limit, to ensure reliable operation. The use of a heat sink or cold plate to manage the external thermal resistance has been well documented in the literature. However, the measurement of thermal performance of today state-of-the-art cold plates is challenging because of the low value of thermal resistance that they offer to heat dissipation. In this paper, the design of a tester apparatus for such high performance cold plates is presented. The expected performance of the tester is modeled numerically for a heat flux of 250 W/cm2, and for a range of footprint areas of 100-400 mm2. The analysis study is supported by a detailed uncertainty analysis that utilizes a Monte Carlo simulation approach. It was observed that the sum of random and repeatable errors could be controlled to within ±7.5% even for a very high performance cold plate with an effective heat transfer coefficient of 200,000 W/m2-K dissipating 250 W/cm2, with assumed errors in other relevant parameters.

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