In this paper, the development of wafer level packaging of radio frequency (RF) microelectromechanical system (MEMS) is reported. The packaging process consists of wafer bonding, wafer thinning, via etching, plating, under-bump-metallization (UBM) and bumping processes. 6-inch Si and glass wafers are used in the study. RF MEMS devices are fabricated on Si wafers and sandwiched between Si and glass cap wafers. To maintain the pressure balance between the cavities and outside world after bonding process, Si and glass wafers are anodically bonded at a pressure of 2 bar and a bonding temperature of 400 °C. The cavities are hermetically sealed. The glass wafer of the bonded pair is thinned down to 100 μm using mechanical polishing and chemical etching, the good uniformity of the wafer thickness is maintained with etching process. A layer of Cr/Au is sputtered and patterned as the hard mask for glass via etching process. Via holes with undercut closer to the etching depth are formed in HF+HNO3 acid. After stripping the metal mask, a seed layer of TiW/Cu is deposited using sputtering and plating processes. TiW layer is used to enhance the adhesion of metal and glass. With the completion of the re-routing and via metallization processes, benzocyclobutene (BCB) photoresist is used to planarize via holes and opened for UBM process. Finally, the packaged devices can be assembled using flip chip approach.
- Electronic and Photonic Packaging Division
Wafer Level Packaging of RF MEMS for Flip Chip Assembly
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Wei, J, Lok, BK, Lim, PC, Nai, ML, Lu, HJ, Lai, FK, & Wong, CK. "Wafer Level Packaging of RF MEMS for Flip Chip Assembly." Proceedings of the ASME 2003 International Mechanical Engineering Congress and Exposition. Electronic and Photonic Packaging, Electrical Systems and Photonic Design, and Nanotechnology. Washington, DC, USA. November 15–21, 2003. pp. 119-123. ASME. https://doi.org/10.1115/IMECE2003-42825
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