Tunable Phase Grating Using CMOS Processes

We present the development of a tunable phase grating using CMOS process in this paper. With CMOS processes, structure feature of sub-micrometer can be easily approached. In the design of our grating devices, we have ribbons of 0.7um and minimum separate spacing of 0.65um between ribbons. We used aluminum as ribbon material in our design, The ribbons were released via RIE to remove the SiO₂ sacrificial layer. In our devices, we have successfully released the ribbons with the width from 0.7um up to 2um. The dry etching processes, which we developed to release ribbons in our devices, can avoid sticking problems and structure destruction. For electrostatic actuator, we use partial electrode design to obtain wider flat-reflection sections, and larger steady tuning distance. In this paper, we describe design, modeling, simulation, and measurement results of our tunable grating devices.