Self Heating Distribution in Arrayed Power Devices as a Function of External Package Temperature

Thermoreflectance thermal images of a biased high power silicon transistor array reveal nonuniform self heating patterns with strong dependence on external die temperature. Good correlation is shown between the measured self heating distribution and simulations of the power and temperature distribution throughout the arrayed power device at three different external die temperatures: T_E = 296, 333, and 373K. Methods that rely on purely electrical measurements to extract device thermal parameters generally assume uniform temperature and bias across the full device. Two-dimension temperature and power distribution maps provide important information about spatial self heating nonuniformity throughout the device, which can lead to more accurate assessment of device thermal parameters.