The lifetime of NAND flash is highly restricted by bit error rate (BER) which would exponentially increase with the number of program/erase cycles. While the error correcting codes (ECC) can only provide a limited error correction ability to tolerate the bit errors. To face this challenge, a novel bad page management (BPM) strategy is proposed to extend the lifetime of NAND flash based on the experimental observations in our hardware-software co-designed experimental platform. The experimental observations indicate that retention error is the dominant type of NAND flash errors, which is caused by the charge leakage in memory cells over time. The BER distribution of retention error shows distinct variance in different pages. The key idea of BPM is to excavate lifetime potency of each page in a block by introducing the fine granularity bad page management instead of the coarse granularity bad block management. In addition, to balance the lifetime enhancement and the storage capacity degradation, a configurable threshold of bad page management (CT-BPM) strategy is proposed to utilize in the storage capacity highly demanded applications. The experimental results show that BPM can provide dozens of times (about 35 times for 3x-nm NAND flash) average lifetime extension without additional hardware cost, while experiencing at most 5% degradation in writing speed.
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ASME 2015 International Design Engineering Technical Conferences and Computers and Information in Engineering Conference
August 2–5, 2015
Boston, Massachusetts, USA
Conference Sponsors:
- Design Engineering Division
- Computers and Information in Engineering Division
ISBN:
978-0-7918-5719-9
PROCEEDINGS PAPER
BPM: A Bad Page Management Strategy for the Lifetime Extension of Flash Memory
Wei Debao,
Wei Debao
Harbin Institute of Technology, Harbin, Heilongjiang, China
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Qiao Liyan,
Qiao Liyan
Harbin Institute of Technology, Harbin, Heilongjiang, China
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Zhang Peng,
Zhang Peng
Harbin Institute of Technology, Harbin, Heilongjiang, China
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Peng Xiyuan
Peng Xiyuan
Harbin Institute of Technology, Harbin, Heilongjiang, China
Search for other works by this author on:
Wei Debao
Harbin Institute of Technology, Harbin, Heilongjiang, China
Qiao Liyan
Harbin Institute of Technology, Harbin, Heilongjiang, China
Zhang Peng
Harbin Institute of Technology, Harbin, Heilongjiang, China
Peng Xiyuan
Harbin Institute of Technology, Harbin, Heilongjiang, China
Paper No:
DETC2015-46604, V009T07A010; 8 pages
Published Online:
January 19, 2016
Citation
Debao, W, Liyan, Q, Peng, Z, & Xiyuan, P. "BPM: A Bad Page Management Strategy for the Lifetime Extension of Flash Memory." Proceedings of the ASME 2015 International Design Engineering Technical Conferences and Computers and Information in Engineering Conference. Volume 9: 2015 ASME/IEEE International Conference on Mechatronic and Embedded Systems and Applications. Boston, Massachusetts, USA. August 2–5, 2015. V009T07A010. ASME. https://doi.org/10.1115/DETC2015-46604
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