In manufacturing process planning, it is critical to ensure that the part generated from a process plan complies with tolerances specified by designers to meet engineering constraints. Manufacturing errors are stochastic in nature and are introduced at almost every stage of executing a plan, for example due to inaccuracy of tooling, misalignment of location, distortion of clamping etc. Furthermore, these errors accumulate or ‘stack-up’ as the manufacturing process progresses to inevitably produce a part that varies from the designed model. The resultant variation should be within prescribed design tolerances. In this work, we present a novel approach for validating process plans using 3D tolerance stack-up analysis by representing variations of nominal features in terms of extents of their degrees of freedom within design and manufacturing tolerance zones. We will show how the manufacturing error stack-up can be effectively represented by composition and intersection of these transformations. We demonstrate several examples with different tolerance specifications to show the applicability of our approach for process planning.
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ASME 2014 International Design Engineering Technical Conferences and Computers and Information in Engineering Conference
August 17–20, 2014
Buffalo, New York, USA
Conference Sponsors:
- Design Engineering Division
- Computers and Information in Engineering Division
ISBN:
978-0-7918-4628-5
PROCEEDINGS PAPER
Tolerance Analysis for Validating Manufacturing Process Plans
Wentao Fu,
Wentao Fu
The University of Texas at Austin, Austin, TX
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Saigopal Nelaturi,
Saigopal Nelaturi
Palo Alto Research Center, Palo Alto, CA
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Arvind Rangarajan,
Arvind Rangarajan
Palo Alto Research Center, Palo Alto, CA
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Tolga Kurtoglu
Tolga Kurtoglu
Palo Alto Research Center, Palo Alto, CA
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Wentao Fu
The University of Texas at Austin, Austin, TX
Saigopal Nelaturi
Palo Alto Research Center, Palo Alto, CA
Arvind Rangarajan
Palo Alto Research Center, Palo Alto, CA
Tolga Kurtoglu
Palo Alto Research Center, Palo Alto, CA
Paper No:
DETC2014-34329, V01AT02A055; 9 pages
Published Online:
January 13, 2015
Citation
Fu, W, Nelaturi, S, Rangarajan, A, & Kurtoglu, T. "Tolerance Analysis for Validating Manufacturing Process Plans." Proceedings of the ASME 2014 International Design Engineering Technical Conferences and Computers and Information in Engineering Conference. Volume 1A: 34th Computers and Information in Engineering Conference. Buffalo, New York, USA. August 17–20, 2014. V01AT02A055. ASME. https://doi.org/10.1115/DETC2014-34329
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