A new mathematical model for representing the geometric variations of tabs/slots is extended to include probabilistic representations of 1-D clearance which can be determined from multi-dimensional variations of the medial plane for a slot or a tab, and from variations of both medial planes in a tab-slot assembly. The model is compatible with the ASME/ANSI/ISO Standards for geometric tolerances. Central to the new model is a Tolerance-Map (T-Map), a hypothetical volume of points that models the range of 3-D variations in location and orientation for a segment of a plane (the medial plane), which can arise from tolerances on size, position, orientation, and form. Here it is extended to model the increases in yield that occur when the optional maximum material condition (MMC) is specified and when tolerances are assigned statistically rather than on a worst-case basis. The frequency distribution of 1-D clearance is decomposed into manufacturing bias, i.e. toward certain regions of a Tolerance-Map, and into a geometric bias that can be computed from the geometry of multidimensional T-Maps. Although the probabilistic representation in this paper is built from geometric bias, and it is presumed that manufacturing bias is uniform, the method is robust enough to include manufacturing bias in the future. Geometric bias alone shows a greater likelihood of small clearances than large clearances between an assembled tab and slot. A comparison is made between the effects of choosing the optional MMC and not choosing it with the tolerance that determines the allowable variations in position of a slot.
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ASME 2007 International Design Engineering Technical Conferences and Computers and Information in Engineering Conference
September 4–7, 2007
Las Vegas, Nevada, USA
Conference Sponsors:
- Design Engineering Division and Computers and Information in Engineering Division
ISBN:
0-7918-4803-5
PROCEEDINGS PAPER
Using Tolerance-Maps to Generate Frequency Distributions of Clearance for Tab-Slot Assemblies
Gaurav Ameta,
Gaurav Ameta
Arizona State University, Tempe, AZ
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Joseph K. Davidson,
Joseph K. Davidson
Arizona State University, Tempe, AZ
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Jami J. Shah
Jami J. Shah
Arizona State University, Tempe, AZ
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Gaurav Ameta
Arizona State University, Tempe, AZ
Joseph K. Davidson
Arizona State University, Tempe, AZ
Jami J. Shah
Arizona State University, Tempe, AZ
Paper No:
DETC2007-35162, pp. 177-188; 12 pages
Published Online:
May 20, 2009
Citation
Ameta, G, Davidson, JK, & Shah, JJ. "Using Tolerance-Maps to Generate Frequency Distributions of Clearance for Tab-Slot Assemblies." Proceedings of the ASME 2007 International Design Engineering Technical Conferences and Computers and Information in Engineering Conference. Volume 2: 27th Computers and Information in Engineering Conference, Parts A and B. Las Vegas, Nevada, USA. September 4–7, 2007. pp. 177-188. ASME. https://doi.org/10.1115/DETC2007-35162
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