Features of verification FPGA-based safety critical I&C systems (FBIC) using of fault-insertion technique (FIT) are analyzed. The FIT is applied in process of certification to meet requirements of IEC 61508 according with safety integrity level (SIL). Specific aspects of FBIC SIL-certification are described. Concept of FIT-ability, theoretical issues and optimal FIT procedure taking into account different points and means of fault insertion are offered. The developed technique and tool to verify FPGA-based platform RadICS using FIT procedure during SIL-certification are described.

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