A high performance hardware acceleration coprocessor built on field programmable arrays (FPGAs) is designed to accelerate neutron transport computation for three dimensional whole reactor cores. The acceleration coprocessor is designed based on the reconfigurable computation techniques and adopts the dataflow-driven non von Neumann architecture for high efficient parallel computation. The hardware acceleration coprocessor supports much more intensive available computation power compare with the same-era CPUs, and is compatible with existing software acceleration methods. It reaches about 20 times speed up in simulation validations. It is the first time that the reconfigurable hardware acceleration techniques are used to improve the computational efficiency of the reactor physics and neutron transport simulations.
- Nuclear Engineering Division
High Performance Reconfigurable Hardware Acceleration on Neutron Transport Computation Based on AGENT Methodology
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Xiao, S, & Jevremovic, T. "High Performance Reconfigurable Hardware Acceleration on Neutron Transport Computation Based on AGENT Methodology." Proceedings of the 18th International Conference on Nuclear Engineering. 18th International Conference on Nuclear Engineering: Volume 2. Xi’an, China. May 17–21, 2010. pp. 205-210. ASME. https://doi.org/10.1115/ICONE18-29614
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