With the proliferation of multiple cores on a single processor and the integration of numerous stacked die in chip packages, the resulting non-uniformity in power dissipation necessitates spatially and temporally localized control of temperature in the package. Thermoelectric (TE) devices can potentially provide one mechanism to achieve such control. Unfortunately, at typical junction-to-ambient temperatures, the coefficient-of-performance (COP) of existing bulk TE devices tends to be quite low. As a result, for many high-power systems, the additional power input required to operate a TE cooling module can lead to an increase in the overall system cost-of-ownership, causing TE cooling solutions to be excluded from cost-sensitive thermal management solutions in high-volume computer systems. However, recent trends of compaction and consolidation of computer servers in high-density data centers have resulted in a dramatic increase in the burdened cost-of-ownership of mission-critical IT facilities. For example, the energy consumption of the cooling infrastructure for many high-density data centers can equal or exceed the power consumption of the compute equipment. Thus, for the growing enterprise thermal management segment, the appropriate metric is no longer the COP of the thermal solution but rather the COP of the cooling ensemble, which takes into account the energy efficiency of cooling solutions in the chip, system, rack, data center and facility. To examine the effects of chip-level COP on the ensemble-level COP, this paper explores a case study comparing two ensemble solutions. In one case, local hotspots on a chip in a three-dimensional package are mitigated by increasing fan power at the system level (and subsequently, in the computer room and the rest of the ensemble). In another case, local hotspots at the chip are mitigated through spot-cooling via TE cooling modules. For each of these cases, the COP of the ensemble is evaluated. The model suggests that while feasible, the benefit of using TEs at current performance levels is limited. However, ongoing research that may improve TE performance in the future has the potential to enhance infrastructure energy efficiency.
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ASME 2008 Heat Transfer Summer Conference collocated with the Fluids Engineering, Energy Sustainability, and 3rd Energy Nanotechnology Conferences
August 10–14, 2008
Jacksonville, Florida, USA
Conference Sponsors:
- Heat Transfer Division
ISBN:
978-0-7918-4848-7
PROCEEDINGS PAPER
Optimization of Thermoelectric Modules for Computer System Thermal Management and Infrastructure Energy Efficiency Available to Purchase
Amip J. Shah,
Amip J. Shah
Hewlett Packard Laboratories, Palo Alto, CA
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Anita Rogacs,
Anita Rogacs
Hewlett Packard Laboratories, Palo Alto, CA
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Chandrakant D. Patel
Chandrakant D. Patel
Hewlett Packard Laboratories, Palo Alto, CA
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Amip J. Shah
Hewlett Packard Laboratories, Palo Alto, CA
Anita Rogacs
Hewlett Packard Laboratories, Palo Alto, CA
Chandrakant D. Patel
Hewlett Packard Laboratories, Palo Alto, CA
Paper No:
HT2008-56210, pp. 653-662; 10 pages
Published Online:
July 7, 2009
Citation
Shah, AJ, Rogacs, A, & Patel, CD. "Optimization of Thermoelectric Modules for Computer System Thermal Management and Infrastructure Energy Efficiency." Proceedings of the ASME 2008 Heat Transfer Summer Conference collocated with the Fluids Engineering, Energy Sustainability, and 3rd Energy Nanotechnology Conferences. Heat Transfer: Volume 2. Jacksonville, Florida, USA. August 10–14, 2008. pp. 653-662. ASME. https://doi.org/10.1115/HT2008-56210
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