HDP-CVD reactors are used for Shallow Trench Isolation (STI), Inter Metal Dielectric (IMD) and Inter Layer Dielectric (ILD) applications for logic and memory device fabrication. As device dimension shrinks, the trend has been to use lower pressure and higher plasma density for gap-fill with higher aspect ratio (AR). Higher AR gapfill in addition to higher throughput is achieved by running multiple wafers between a chamber clean, present a unique set of challenges for heat and mass-transfer in an HDP-CVD reactor. This paper describes some of the new state-of-the-art hardware innovations specifically developed to meet these challenges. In particular, heat transfer to plasma facing materials, fluid mechanics, and transport of sub-micron sized particles in the plasma environment of an HDP-CVD reactor are explored.

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